With the rapid development of the electronics industry, the profiles of electronic products tend to be thin, short, and small, and the functions thereof tend to be high performance in terms of functionality and speed. To satisfy the package requirements for high integration and miniaturization, circuit boards providing a plurality of active and passive components and circuit connections are typically designed as multi-layer boards instead of single-layer boards, so as to enlarge the usable circuit area of the circuit boards via interlayer connection technology to satisfy the requirement for high circuit density.
However, with the increase in the number of conductive trace layers and the component density of the circuit board, heat generated in the operation of semiconductor chips utilizing high integration techniques is also greatly increased. Consequently, a semiconductor package can overheat. Furthermore, the life-span of the semiconductor chip will be reduced if heat is not adequately dissipated. Currently, the ball grid array (BGA) structure used for packages cannot meet the electrical and heat dissipation requirements under circumstances with a high pin count (1500+ pins) or high frequency (5+ GHz). The flip chip ball grid array (FCBGA) structure can be used in products having such pin counts and frequencies; however, the package cost is high, and there are many limitations for this technology, especially in terms of the electrically connectivity thereof. Moreover, for the sake of environmental protection, many electrical connecting materials, such as lead, a soldering material, are discouraged, but the electrical and mechanical qualities of substitute materials are generally not as stable.
For these reasons, a package involving a semiconductor chip embedded in a substrate has been proposed. As shown in FIG. 1, U.S. Pat. No. 6,709,898 discloses a semiconductor package having a heat dissipating function. As shown in the figure, the semiconductor package comprises a heat sink 102 having at least one recess 104; a semiconductor chip 114 having a non-active surface 118 that is mounted in a recess 104 via a heat-conductive adhesive material 120; and a build-up circuit structure 122 formed on the heat sink 102 and the semiconductor chip 114 via build-up circuit technology.
Referring to FIG. 2, a cross-sectional view of the heat sink 102 is illustrated. As shown in the figure, the recesses 104 of the heat sink 102 are extended to a certain depth to form a cavity from the upper surface of the heat sink 102.
Referring to FIG. 3, the material of the heat sink 102 supporting the semiconductor chip 114 utilizes an integral metallic material. Although a half-etching method can be used to firstly form the recess 104 receiving the semiconductor chip 114, the uniformity of such etching is difficult to control such that each of the recesses 104 in the whole heat sink 102 may be formed unevenly, which would not achieve an even plane. In such case, the mounting and connecting of semiconductor components might be affected, the height and uniformity of which would be more difficult to control, or worse, the quality and reliability of subsequent build-up circuit fabricating procedures could be affected.
In addition, the miniaturization of electronic products has long been a trend, and electronic products having a single function cannot satisfy the requirements of customers any more. Nowadays, portable electronic products, such as a multiple function electronic product combining a mobile phone and a digital camera, often combine multiple functions. Consequently, in the electronics industry, single-function integrated circuits have evolved into multi-function, high performance devices. An integrated circuit having multiple functions frequently serves as the main structure or component for a device, with various passive components, such as resistors, capacitors or inductances, connected to the input/output connections thereof to cooperatively provide said functions. But space must be provided for such passive components. However, another problem with the semiconductor package having heat dissipating function disclosed in the above US patent is that there is often little or no room for receiving passive components, leaving the goal of full modularization unachieved; and, because there is insufficient room for receiving other electronic components, the integrated circuit can not be effectively utilized in terms of incorporated functionality and connectivity.